Sr. Logic Design Engineer Ma3437
Vitesse Semiconductor (Boston North, Massachusetts)

This job posting has expired.

You may wish to try a search for Sr. Logic Design Engineer MA3437

Or visit the FlipDog home page
 

Experienced ASIC logic design engineer for creating next generation products in cutting edge technology.  The candidate will participate in definition, specification, RTL implementation and unit testing.  Responsibilities include determining the chip verification requirements and constraints generation for static timing and synthesis.  The individual will be working with a design that includes high-speed I/O, custom IP, reusable cores and large logic blocks with memories.  Responsibilities include floor planning, linting, constraints generation, RTL synthesis and static timing analysis.  The individual will be responsible for interfacing with the verification and back-end design teams definition through tape-out.  Knowledge of OTN, SONET and Ethernet protocols preferred.  Must be able to work independently and engage in technical dialog with customers and peers.  Knowledge of the issues associated with complex ASIC designs in required, including logic synthesis, functional verification, constraints generation and timing driven design. The candidate must be fluent in either Verilog or VHDL.  Knowledge of the following tools is desired: Modelsim Questa, PrimeTime, HDLscore, Magma Blast RTL, Mentor BSD Architect and Fastscan.  Education required: BSEE or MSEE with 7+ years for industry experience in ASIC design. Vitesse offers a competitive wage and immediate, comprehensive benefits package. We are an equal opportunity employer M/F/D/V.